With the rapid development of electronic technology, modern electronic products are designed to have a compact size. Accordingly, semiconductor package manufacturers encounter many manufacturing bottlenecks. A plurality of conductive circuits made of copper and a plurality of electrically connecting pads extended from the conductive circuits, for electronic signal or power transmission, are formed on a surface of a circuit board applied in a semiconductor package fabrication process. A nickel/gold layer is further formed on the surfaces of the connecting pads for electrically coupling to other conductive components, such as gold wires or solder balls, and for preventing the connecting pads from oxidation. The connecting pads may be, for example, bonding fingers formed on a circuit board of a semiconductor chip package. Furthermore, the exposed surfaces of the connecting pads is covered by a nickel/gold layer, so that both the gold wires and the bonding fingers are made of the same material. This thereby allows the gold wires to be electrically coupled to the bonding fingers of the circuit board during a succeeding wire bonding process. The connecting pads are, for example, bump pads, ball pads or contact lands formed on the circuit board of the semiconductor package. Through the formation of the nickel/gold layer on the exposed surfaces of the connecting pads, the connecting pads usually made of copper, such as the bump pads, ball pads, and contact lands, covered with the nickel/gold layer are not likely to be oxidized, so that the electrical connection quality of the bump pads or ball pads is improved.
In order to follow the trend toward compact size for electronic products, a circuit board made by a non plating line (NPL) process is introduced to the market. In the NPL process, a nickel/gold layer is electroplated on the exposed surfaces of the connecting pads. FIGS. 1A to 1F, show the method disclosed in U.S. Pat. No. 6,576,540.
As shown in FIG. 1A, a circuit board 100 with a circuit layer 105 is provided by a completed circuit fabrication process.
As shown in FIG. 1B, a conductive film 110 is formed on the circuit board 100.
As shown in FIG. 1C, a first resistive layer 115 is formed on the conductive film 110. The first resistive layer 115 comprises an opening 1151 through which a portion of the conductive film 110 on the circuit layer 105 and the electrically connecting pads 1051 is exposed.
As shown in FIG. 1D, a portion of the conductive film 110 not covered by the first resistive layer 115 is removed.
As shown in FIG. 1E, a second resistive layer 120 is further formed on the circuit board 100, for covering a portion of the conductive film 110 remaining in the opening 1151 of the first resistive layer 115.
As shown in FIG. 1F, a nickel/gold layer 125 is electroplated on at least one of the electrically connecting pads 1051 of the circuit board 100.
In the fabrication process, a conductive film has to be disposed on both the top and bottom surfaces of the circuit board, and a plurality of patterned resistive layers are further provided in order to perform a photoresist image transfer process on the top and bottom surfaces of the circuit board twice. Hence, the fabrication process is complicated and characterized by a prolonged process cycle. As regards a fabrication process applied to the fabrication of a circuit board have a plurality of electrically connecting pads of fine pitch, for example, a substrate for IC packaging with a ball pad diameter that ranges between 350 and 450 μm, and a ball pitch (the distance between the centers of two neighboring ball pads) less than 500 μm, the distance between the edges of two neighboring ball pads is around 100 μm—a distance much shorter than the ball pad diameter (350˜450 μm). Given the aforesaid dimensions, performing a photoresist image transfer process twice entails covering a conductive film residually exposed out of an opening in the first resist layer with the second resist layer, and thus an opening of the second resist layer has to be smaller than that of the first resist layer. However, owing to the limits in the precision of alignment of a photolithography process, a small through hole is liable to alignment errors, and in consequence the second resist layer fails to cover the first resist layer precisely; as a result, no nickel/gold layers can be precisely electroplated on the ball pads by a subsequent electroplating process.
Therefore, providing a cheap and simple method for fabricating a circuit board structure by electroplating a metal layer such as a nickel/gold layer on electrically connecting pads to solve the problems arising from the adoption of the NPL process in the circuit board fabrication process of the prior art is becoming one of the most urgent issues in the art.